The present invention relates to a data separator for use in reading data from a disk drive. More particularly, the present invention relates to a restart circuit which starts a voltage controlled oscillator in-phase with a signal from a disk drive read head.
In the art of data recording, data is stored in a disk drive system by positioning a read/write transducer head proximate a rotating magnetic disk. A write signal is applied to the read/write head causing the head to emit a transient magnetic field, which creates a series of magnetic polarizations on the disk surface. The write signal is created by synchronizing the data to be written with a write clock signal. Typically, the write clock signal itself is not written to the disk surface.
When reading data from the disk, the read/write head passes over the magnetic polarizations. This induces a transducer signal in the read/write head. The transducer signal is processed to form a read signal. Because the write clock signal which originally synchronized the data is not itself written to the disk, a read clock signal must be recreated to frame the data embedded in the read signal. The read clock signal must compensate for variations in the rate at which data is read from the disk. These variations are typically caused by imperfections in the servo mechanism that rotates the disk, and by vibrations.
It is known in the art to utilize a phase locked loop to create a read clock signal which can frame the data embedded in the read signal. A typical phase locked loop is comprised of a voltage controlled oscillator (VCO), a phase detector, a charge pump and a loop filter. The VCO receives an input voltage and produces an output signal having a frequency which varies with the magnitude of the input voltage. A read clock signal is derived from the VCO output signal (typically by applying the VCO output signal to a frequency divider). The phase detector compares the phase of the read clock signal with the phase of the read signal.
If the phase of the read clock signal lags the phase of the read signal, the phase detector will issue a pump-up signal to the charge pump. The pump-up signal raises the voltage delivered to the VCO input, thereby raising the frequency of the VCO output signal and the read clock signal. If the phase of the VCO output signal leads the phase of the read signal, then the phase detector will issue a pump-down signal to the charge pump. The pump-down signal lowers the voltage supplied to the VCO, thereby lowering the frequency of the VCO output signal and the read clock signal. Accordingly, the read clock signal will eventually lock on to the read signal.
When the read/write head begins reading from the disk surface, it is desirable to have the VCO lock on to the phase and frequency of the external input signal as quickly as possible Minuhin et al, U.S. Pat. No. 4,875,108, discloses a phase locked loop wherein the initial phase error between a VCO signal and an external input signal will be no more than one-eighth of a detection window.
The phase locked loop disclosed by Minuhin employs a VCO which provides four output signals, each at the same frequency, but phase shifted by 90.degree. from each other. When the external input signal transitions from one voltage level to another, a selection apparatus selects the VCO output having the closest phase to the external input signal. As a result, the initial phase error will be no more than one-eighth of a detection window.
Another technique known in the art attempts to minimize the initial phase error between an external input signal and a VCO output signal by stopping the VCO and thereafter starting the VCO based on a transition from one voltage level to another voltage level in the external input signal. By starting the VCO based on a transition in the external input signal, the phase difference between the VCO output signal and the external input signal is reduced.
One problem associated with stopping and starting the VCO is that a typical VCO will not start oscillating immediately after receiving a start signal. A typical VCO is comprised of a pair of transistors coupled in a regenerative feedback loop such that a capacitor is continuously charged and discharged. This type of VCO is typically stopped by using a transistor to break the regenerative feedback loop, thereby causing circuit nodes in the VCO to become clamped at certain voltages.
Unfortunately, the simplest and most stable methods of clamping the voltages introduce a large VCO startup interval. Attempts have been made to minimize the startup interval by clamping circuit nodes in the VCO at voltages which are closer to the voltages at which the regenerative feedback loop would switch states. However, these methods require additional circuitry and tend to stop the VCO at a point which is inherently less stable. In addition, such methods can never completely eliminate an initial phase error. It is nearly impossible to clamp voltages at circuit nodes in the VCO at levels which would cause the VCO output signal to instantly transition from one state to another upon receiving the start signal.